我們重視您的隱私
通過點擊「允許所有 Cookie」，代表您同意在您的設備上存儲 Cookie 以增強網站瀏覽體驗、分析網站使用情況並協助我們的行銷和網站效能優化工作。您可以在我們的隱私權政策中找到有關於此的更多資訊。
產品敘述
WEN025664B-CTP為一款3.12吋COF結構繪圖型OLED顯示模組，整合電容式觸控面板（CTP），解析度為256×64 dots。此模組採用SSD1322驅動IC，支援6800/8080 並列介面與3/4線 SPI 串列介面。
此OLED模組支援4-bit灰階顯示，操作電壓為3V邏輯電源，採用1/64 duty驅動方式。觸控面板採用FT6336U控制IC，支援I2C介面與單點觸控，面板表面為一般亮面（Normal Glare）。
此模組含PCB設計，可直接以線材連接應用系統，無需額外開發電路板。整合電源電路與固定孔位，有助於系統整合與機構安裝。
操作溫度範圍為-20°C至+70°C，儲存溫度範圍為-30°C至+80°C。適用於智慧家電、工業控制及醫療設備等應用。
同系列OLED面板另提供以下選項：
- WEX025664B：不含金屬框、PCB與觸控
- WEX025664B-CTP：不含金屬框與PCB，含CTP觸控
- WEN025664B：含金屬框與PCB
規格圖
Data source ref: WEN025664BWPP3D00000
產品規格
規格說明
| 項目 | 尺寸 | 單位 |
|---|---|---|
| 點陣 | 256 x 64 Dots | － |
| 模組尺寸 | 89.2 × 44.0 × 7.98 | mm |
| 有效區域 | 76.78 × 19.18 | mm |
| 點大小 | 0.278 × 0.278 | mm |
| 點間距 | 0.3 × 0.3 | mm |
| 顯示模式 | 被動矩陣 | |
| 發光顏色 | 單色 | |
| 驅動方式 | 1/64 Duty | |
| 灰階 | 4 bits | |
| OLED IC | SSD1322 (COF) | |
| OLED 介面 | 6800, 8080, SPI | |
| 尺寸(對角線) | 3.12 吋 | |
| CTP IC | FT6336U | |
| 支援手指數 | 1 | |
| CTP 介面 | I2C | |
| 表面 | 亮面 | |
最大絕對額定值
| 參數 | 符號 | 最小值 | 最大值 | 單位 |
|---|---|---|---|---|
| 顯示電源電壓 | VDD | -0.3 | 4 | V |
| 工作溫度 | TOP | -20 | +70 | °C |
| 儲存溫度 | TSTG | -30 | +80 | °C |
電氣特性
DC 電氣特性
| 項目 | 符號 | 條件 | 最小值 | 典型值 | 最大值 | 單位 |
|---|---|---|---|---|---|---|
| 邏輯電源電壓 | VDD | － | 2.8 | 3.0 | 3.3 | V |
| 輸入高準位 | VIH | － | 0.8×VDD | － | VDD | V |
| 輸入低準位 | VIL | － | 0 | － | 0.2×VDD | V |
| 輸出高準位 | VOH | － | 0.9×VDD | － | VDD | V |
| 輸出低準位 | VOL | － | 0 | － | 0.1×VDD | V |
| 50%顯示畫面耗電流 | IDD | VDD =3V | － | 150 | 300 | mA |
Pin功能定義
| Pin Number | 符號 | I/O | 功能說明 | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | VSS | P | Ground. | ||||||||||
| 2 | VDD | P | Power Supply for Core Logic Circuit Power supply pin for core logic operation. A capacitor is required to connect between this pin and VSS |
||||||||||
| 3 | N.C. | P | Reserved Pin The N.C. pin between function pins are reserved for compatible and flexible design. |
||||||||||
| 4 | D/C# | I | Data/Command Control This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, the content at D[7:0] will be interpreted as data. When the pin is pulled LOW, the content at D[7:0] will be interpreted as command. |
||||||||||
| 5 | R/W# (WR#) |
I | Read/Write Select or Write This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as Read/Write (R/W#) selection input. Pull this pin to “High” for read mode and pull it to “Low” for write mode. When 80XX interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled low and the CS# is pulled low. When serial mode is selected, this pin must be connected to VSS. |
||||||||||
| 6 | E/RD# | I | Read/Write Enable or Read This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled high and the CS# is pulled low. When connecting to an 80XX-microprocessor, this pin receives the Read (RD#) signal. Data read operation is initiated when this pin is pulled low and CS# is pulled low. When serial mode is selected, this pin must be connected to VSS. |
||||||||||
| 7~14 | DB0 | I/O | Host Data Input/Output Bus These pins are 8-bit bi-directional data bus to be connected to the microprocessor’s data bus. When serial mode is selected, D1 will be the serial data input SDIN and D0 will be the serial clock input SCLK. |
||||||||||
| DB1 | |||||||||||||
| DB2 | |||||||||||||
| DB3 | |||||||||||||
| DB4 | |||||||||||||
| DB5 | |||||||||||||
| DB6 | |||||||||||||
| DB7 | |||||||||||||
| 15 | NC | P | Reserved Pin The N.C. pin between function pins are reserved for compatible and flexible design. |
||||||||||
| 16 | RES# | I | This pin is reset signal input. When the pin is pulled LOW, initialization of the chip is executed. Keep this pin pull HIGH during normal operation. |
||||||||||
| 17 | CS# | I | Data/Command Control This pin is the chip select input connecting to the MCU. The chip is enabled for MCU communication only when CS# is pulled LOW. |
||||||||||
| 18 | NC | P | Reserved Pin The N.C. pin between function pins are reserved for compatible and flexible design. |
||||||||||
| 19 | BS1 | I | Communicating Protocol Select These pins are MCU interface selection input. See the following table:
(1) 0 is connected to VSS (2) 1 is connected to VDD |
||||||||||
| 20 | BS0 | ||||||||||||
| 21 | TP_SCK | I | I2C clock input | ||||||||||
| 22 | TP_SDA | I | I2C data input and output | ||||||||||
| 23 | TP_INT | I | External interrupt to the host | ||||||||||
| 24 | TP_RST | I | External Reset, Low is active |