Model No. WAA0290A2ADA8NXXX000
►Size: 2.9"
►Resolution: 296x128 dots
►Interface: MCU / SPI
►Touch Screen : With capacitive touch panel
►The display refreshes black-and-white e-paper displays.
WAA0290A2ADA8NXXX000 is a 2.9" Electronic Paper Display (EPD) with a capacitive touch panel, a front-light panel, and a reference system design. The display is capable of showing images in 1-bit black and white with full display capabilities. The 2.9-inch active area has a resolution of 296x128 pixels.
This module is a TFT-array-driven electrophoresis display with integrated circuits, including a gate driver, source driver, MCU interface, timing controller, oscillator, DC-DC converter, SRAM, LUT, and VCOM. The module is suitable for use in portable electronic devices, such as Electronic Shelf Label (ESL) systems.
| Parameter | Specifications | Unit |
|---|---|---|
| Screen Size | 2.9 | Inch |
| Display Resolution | 296(H)×128(V) | Pixel |
| Active Area | 29.056(H)×66.896(V) | mm |
| Pixel Pitch | 0.227×0.226 | mm |
| Pixel Configuration | Rectangle | |
| Outline Dimension | 36.7(H) × 79.0 (V) × 2.15(D) | mm |
| Module Weight | 5.5±0.5 | g |
| Parameter | Symbol | Rating | Unit |
|---|---|---|---|
| Logic supply voltage | VCI | -0.5 to +4.0 | V |
| Logic Input voltage | VIN | -0.5 to VCI +0.5 | V |
| Logic Output voltage | VOUT | -0.5 to VCI +0.5 | V |
| Operating Temp range | TOPR | 0 to +50 | ºC |
| Storage Temp range | TSTG | -25 to+70 | ºC |
| Optimal Storage Temp | TSTGo | 23±2 | ºC |
| Optimal Storage Humidity | HSTGo | 55±10 | %RH |
| No. | Name | I/O | Description |
|---|---|---|---|
| 1 | NC | Do not connect with other NC pins | |
| 2 | GDR | O | N-Channel MOSFET Gate Drive Control |
| 3 | RESE | I | Current Sense Input for the Control Loop |
| 4 | NC | NC | Do not connect with other NC pins |
| 5 | VSH2 | C | Positive Source driving voltage(Red) |
| 6 | TSCL | O | I2C Interface to digital temperature sensor Clock pin |
| 7 | TSDA | I/O | I2C Interface to digital temperature sensor Data pin |
| 8 | BS1 | I | Bus Interface selection pin |
| 9 | BUSY | O | Busy state output pin |
| 10 | RES# | I | Reset signal input. Active Low. |
| 11 | D/C# | I | data /Command control pin |
| 12 | CS# | I | Chip select input pin |
| 13 | SCL | I | Serial Clock pin (SPI) |
| 14 | SDA | I/O | Serial Data pin (SPI) |
| 15 | VDDIO | P | power Supply for interface logic pins It should be connected with VCI |
| 16 | VCI | P | Power Supply for the chip |
| 17 | VSS | P | Ground |
| 18 | VDD | C | Core logic power pin VDD can be regulated internally from VCI. A capacitor should be connected between VDD and VSS |
| 19 | VPP | P | FOR TEST |
| 20 | VSH1 | C | Positive Source driving voltage |
| 21 | VGH | C | Power Supply pin for Positive Gate driving voltage and VSHI |
| 22 | VSL | C | Negative Source driving voltage |
| 23 | VGL | C | Power Supply pin for Negative Gate driving voltage VCOM and VSL |
| 24 | VCOM | C | VCOM driving voltage |
Note: I: Input, O: Output, P: Power, D: Dummy, S: Shorted line, M: Mark, PI: Power input, PO: Power output, I/O: Input / Output, PS: Power Setting, C: Capacitor pin.
By clicking "Allow All Cookies", you agree to the storing of cookies on your device to enhance site navigation, analyse site usage, and assist in our marketing and performance efforts. You can find further information this subject in our policy.
