||Ground pin. It must be connected to external ground.
||Power supply for panel driving voltage. This is also the most positive power voltage supply pin. It is supplied by external high voltage source.
||COM signal deselected voltage level. A capacitor should be connected between this pin and VSS. No external power supply is allowed to connect to this pin.
||Low voltage power supply and power supply for interface logic level. It should match with the MCU interface voltage level and must be connected to external source. VCI must always set to be equivalent to or higher than VDD.
||Power supply pin for core logic operation.
VDD can be supplied externally (within the range of 2.4V to 2.6V) or regulated Internally from VCI. A capacitor should be connected between VDD and VSS under all circumstances.
||MCU bus interface selection pins. Select appropriate logic setting as described in the following table. BS1 is pin select. Bus Interface selection
Note (1) 0 is connected to VSS (2) 1 is connected to VCI
||This pin is the segment output current reference pin
||This pin is the chip select input connecting to the MCU. The chip is enabled for MCU communication only when CS# is pulled LOW (active LOW).
||This pin is reset signal input. When the pin is pulled LOW, initialization of the chip is executed. Keep this pin pull HIGH during normal operation.
||This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, will be interpreted as data. When the pin is pulled LOW, will be transferred to a command register In I2C mode, this pin acts as SA0 for slave address selection.
||When serial interface mode is selected, D0 will be the serial clock input: SCLK; D1 will be the serial data input: SDIN and D2 should be kept NC. When I2C mode is selected, D2, D1 should be tied together and serve as SDAout , SDAin in application and D0 is the serial clock input, SCL.
||I2C clock signal
||I2C data signal
||Power supply for panel driving voltage. This is also the most positive power voltage supply pin.