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WEN025664B型号是一款COF结构的绘图型OLED模块,对角线尺寸为3.12吋,分辨率由256x64 dots组成。该OLED模块内建SSD1322 IC支持4-bit灰阶和8-bits 6800/8080和3/4线SPI界面。外形尺寸为89.2×44.0 mm,有效显示区域尺寸为76.78×19.18 mm。模块逻辑电压为3V,50%显示画面时耗电流为150 mA @ VDD 3.3V(典型值),驱动方式1/64 duty。OLED模块加上PCB设计可使用导线连接,客户不需要额外自行开发PCB版,其整合了接口设定和VDD电路,使客户易于使用。PCB板设计四个螺丝孔方便用户将模块固定在应用产品上。
WEN025664B模块工作温度为-40℃~+80℃;储存温度为-40℃~+85℃。此OLED模块具有10,000:1的高对比度度,可提高图像质量,使细节更加清晰,尤其在低光环境中阅读性更强。COF OLED模块适用于医疗设备、控制面板、智能家居等产品应用。
此外,具有相同尺寸的OLED面板还提供各种替代方案:项目 | 尺寸 | 单位 |
---|---|---|
点阵 | 256 x 64 Dots | - |
模块尺寸 | 89.2 × 44.0 × 3.3 Max. | mm |
有效区域 | 76.78 × 19.18 | mm |
像素大小 | 0.278 × 0.278 | mm |
像素间距 | 0.3×0.3 | mm |
显示模式 | 被动矩阵 | |
发光颜色 | 单色 | |
驱动方式 | 1/64 Duty | |
灰阶 | 4 bits | |
IC | SSD1322 (COF) | |
接口 | 6800, 8080, SPI | |
尺寸 | 3.12 寸 |
参数 | 符号 | 最小值 | 最大值 | 单位 |
---|---|---|---|---|
显示电源电压 | VDD | -0.3 | 4 | V |
工作温度 | TOP | -40 | 80 | °C |
储存温度 | TSTG | -40 | 85 | °C |
项目 | 符号 | 条件 | 最小值 | 典型值 | 最大值 | 单位 |
---|---|---|---|---|---|---|
逻辑电源电压 | VDD | - | 2.8 | 3.0 | 3.3 | V |
输入高准位 | VIH | - | 0.8×VDD | - | VDD | V |
输入低准位 | VIL | - | 0 | - | 0.2×VDD | V |
输出高准位 | VOH | - | 0.9×VDD | - | VDD | V |
输出低准位 | VOL | - | 0 | - | 0.1×VDD | V |
50%显示画面耗电流 | IDD | VCC =3V | - | 150 | 300 | mA |
Pin Number |
符号 | I/O | 功能说明 | ||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|
1 | VSS | P | Ground. | ||||||||||
2 | VDD | P | Power Supply for Core Logic Circuit Power supply pin for core logic operation. A capacitor is required to connect between this pin and VSS |
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3 | N.C. | P | Reserved Pin The N.C. pin between function pins are reserved for compatible and flexible design. |
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4 | D/C# | I | Data/Command Control This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, the content at D[7:0] will be interpreted as data. When the pin is pulled LOW, the content at D[7:0] will be interpreted as command. |
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5 | R/W# (WR#) |
I | Read/Write Select or Write This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as Read/Write (R/W#) selection input. Pull this pin to “High” for read mode and pull it to “Low” for write mode. When 80XX interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled low and the CS# is pulled low. When serial mode is selected, this pin must be connected to VSS. |
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6 | E/RD# | I | Read/Write Enable or Read This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled high and the CS# is pulled low. When connecting to an 80XX-microprocessor, this pin receives the Read (RD#) signal. Data read operation is initiated when this pin is pulled low and CS# is pulled low. When serial mode is selected, this pin must be connected to VSS. |
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7~14 | DB0 | I/O | Host Data Input/Output Bus These pins are 8-bit bi-directional data bus to be connected to the microprocessor’s data bus. When serial mode is selected, DB1 will be the serial data input SDIN and DB0 will be the serial clock input SCLK. |
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DB1 | |||||||||||||
DB2 | |||||||||||||
DB3 | |||||||||||||
DB4 | |||||||||||||
DB5 | |||||||||||||
DB6 | |||||||||||||
DB7 | |||||||||||||
15 | NC | P | Reserved Pin The N.C. pin between function pins are reserved for compatible and flexible design. |
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16 | RES# | I | This pin is reset signal input. When the pin is pulled LOW, initialization of the chip is executed. Keep this pin pull HIGH during normal operation. |
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17 | CS# | I | Data/Command Control This pin is the chip select input connecting to the MCU. The chip is enabled for MCU communication only when CS# is pulled LOW. |
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18 |
NC | P | Reserved Pin The N.C. pin between function pins are reserved for compatible and flexible design. |
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19 | BS1 | I | Communicating Protocol Select These pins are MCU interface selection input. See the following table:
(1) 0 is connected to VSS (2) 1 is connected to VDD |
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20 | BS0 | ||||||||||||
21~24 | NC | P | Reserved Pin The N.C. pin between function pins are reserved for compatible and flexible design. |
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