產品敘述
WEO002004C OLED顯示器為COG結構的20字 x 4行的OLED模組，產品輕薄且高對比對廣視角，低功耗。WEO002004C 內建 SSD1311 IC, 可支援 6800/8080 8-bit 並列介面 和 I2C, 4線 SPI 串列介面。建議客戶可以使用華凌光電此款20x4字元型OLED模組取代傳統LCD模組，將產品升級為PMOLED顯示器。
- 超快反應速度, +25 ℃ 時只需 10 μsec
- 超廣視角 - 可達175度
- 輕薄 -自發光，無需背光
- 超高亮度
- 高對比 - 10,000:1 以上
- 超廣溫
- 低耗電流 - 減少CO2 排放量
可選 FPC
規格圖
Data source ref: WEO002004CLPP5N00000
產品規格
Pin功能定義
| Pin No. | 符號 | Pin 類型 | 說明 | ||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | NC | － | No connection | ||||||||||||||||||||
| 2 | VSL | P | This is segment voltage (output low level) reference pin. When external VSL is not used, this pin should be left open. When external VSL is used, connect with resistor and diode to ground (details depend on application). |
||||||||||||||||||||
| 3 | VSS | P | Ground pin. It must be connected to external ground. | ||||||||||||||||||||
| 4 | REGVDD | I | Internal VDD regulator selection pin in 5V I/O application mode. When this pin is pulled HIGH, internal VDD regulator is enabled (5V I/O application). When this pin is pulled LOW, internal VDD regulator is disabled (Low voltage I/O application). |
||||||||||||||||||||
| 5 | SHLC | I | This pin is used to determine the Common output scanning direction. COM scan direction
(1) 0 is connected to VSS (2) 1 is connected to VDDIO |
||||||||||||||||||||
| 6 | SHLS | I | This pin is used to change the mapping between the display data column address and the Segment driver. SEG scan direction
(1) 0 is connected to VSS (2) 1 is connected to VDDIO |
||||||||||||||||||||
| 7 | VDD | P | Power supply for core logic operation. VDD can be supplied externally or regulated internally. In LV IO application (internal VDD is disabled), this is a power input pin. In 5V IO application (internal VDD is enabled), VDD is regulated internally from VDDIO. A capacitor should be connected between VDD and VSS under all circumstances. |
||||||||||||||||||||
| 8 | VDDIO | P | Low voltage power supply and power supply for interface logic level in both Low Voltage I/O and 5V I/O application. It should match with the MCU interface voltage level and must be connected to external source. | ||||||||||||||||||||
| 9 | BS0 | I | MCU bus interface selection pins. Select appropriate logic setting as described in the following table. BS2, BS1 and BS0 are pin select. Bus Interface selection
(1) 0 is connected to VSS (2) 1 is connected to VDDIO |
||||||||||||||||||||
| 10 | BS1 | ||||||||||||||||||||||
| 11 | BS2 | ||||||||||||||||||||||
| 12 | GPIO | I/O | It is a GPIO pin. Details refer to OLED command DCh. | ||||||||||||||||||||
| 13 | CS# | I | This pin is the chip select input connecting to the MCU. The chip is enabled for MCU communication only when CS# is pulled LOW (active LOW). In I2C mode, this pin must be connected to VSS. |
||||||||||||||||||||
| 14 | RES# | I | This pin is reset signal input. When the pin is pulled LOW, initialization of the chip is executed. Keep this pin pull HIGH during normal operation. |
||||||||||||||||||||
| 15 | D/C# | I | This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, the data at D[7:0] will be interpreted as data. When the pin is pulled LOW, the data at D[7:0] will be transferred to a command register. In I2C mode, this pin acts as SA0 for slave address selection. When serial interface is selected, this pin must be connected to VSS. |
||||||||||||||||||||
| 16 | R/W#(WR#) | I | This pin is read / write control input pin connecting to the MCU interface. When 6800 interface mode is selected, this pin will be used as Read/Write (R/W#) selection input. Read mode will be carried out when this pin is pulled HIGH and write mode when LOW. When 8080 interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled LOW and the chip is selected. When serial or I2C interface is selected, this pin must be connected to VSS. |
||||||||||||||||||||
| 17 | E(RD#) | I | This pin is MCU interface input. When 6800 interface mode is selected, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled HIGH and the chip is selected. When 8080 interface mode is selected, this pin receives the Read (RD#) signal. Read operation is initiated when this pin is pulled LOW and the chip is selected. When serial or I2C interface is selected, this pin must be connected to VSS. |
||||||||||||||||||||
| 18 | D0 | I/O | These pins are bi-directional data bus connecting to the MCU data bus. Unused pins are recommended to tie LOW. When serial interface mode is selected, D0 will be the serial clock input: SCLK; D1 will be the serial data input: SID and D2 will be the serial data output: SOD. When I2C mode is selected, D2, D1 should be tied together and serve as SDAout, SDAin in application and D0 is the serial clock input, SCL. |
||||||||||||||||||||
| 19 | D1 | ||||||||||||||||||||||
| 20 | D2 | ||||||||||||||||||||||
| 21 | D3 | ||||||||||||||||||||||
| 22 | D4 | ||||||||||||||||||||||
| 23 | D5 | ||||||||||||||||||||||
| 24 | D6 | ||||||||||||||||||||||
| 25 | D7 | ||||||||||||||||||||||
| 26 | IREF | I | This pin is the segment output current reference pin. IREF is supplied externally. A resistor should be connected between this pin and VSS to maintain current of around 15uA. |
||||||||||||||||||||
| 27 | ROM0 | I | These pins are used to select Character ROM; select appropriate logic setting as described in the following table. ROM1 and ROM0 are pin select as shown in below table: Character ROM selection
(1) 0 is connected to VSS (2) 1 is connected to VDDIO |
||||||||||||||||||||
| 28 | ROM1 | ||||||||||||||||||||||
| 29 | OPR0 | I | This pin is used to select the character number of character generator. Character RAM selection
Note (1) 0 is connected to VSS (2) 1 is connected to VDDIO |
||||||||||||||||||||
| 30 | OPR1 | ||||||||||||||||||||||
| 31 | VCOMH | P | COM signal deselected voltage level. A capacitor should be connected between this pin and VSS. No external power supply is allowed to connect to this pin. |
||||||||||||||||||||
| 32 | VCC | P | Power supply for panel driving voltage. This is also the most positive power voltage supply pin. It is supplied by external high voltage source. | ||||||||||||||||||||
| 33 | NC | － | No connection |
規格說明
| 項目 | 尺寸 | 單位 |
|---|---|---|
| 字元數 | 20字x4行 | － |
| 模組尺寸 | 84.5 x 27.5 x 2.17 | mm |
| 檢視區域 | 72.42 x 22.82 | mm |
| 有效區域 | 70.42 x 20.82 | mm |
| 點大小 | 0.57 x 0.57 | mm |
| 點間距 | 0.60 x 0.60 | mm |
| 字大小 | 2.97 x 4.77 | mm |
| 字間距 | 3.55 x 5.35 | mm |
| LCD類型 | OLED, 單色 | |
| Duty | 1/32 | |
| IC | SSD1311 | |
| 介面 | 6800,8080,SPI,I2C | |
| 尺寸 | 2.89 寸 | |
最大絕對額定值
| 項目 | 符號 | 最小值 | 最大值 | 單位 |
|---|---|---|---|---|
| 邏輯電源電壓 | VDD | -0.3 | VDDIO | V |
| 輸入/輸出針腳(Pin)電源 | VDDIO | -0.3 | 6 | V |
| 工作電壓 | VCC | 0 | 16 | V |
| 工作溫度 | TOP | -40 | +80 | °C |
| 儲存溫度 | TST | -40 | +85 | °C |
電氣特性
DC 電氣特性
| 項目 | 符號 | 條件 | 最小值 | 典型值 | 最大值 | 單位 |
|---|---|---|---|---|---|---|
| 邏輯電源電壓 | VDD | Low Voltage I/O | 2.4 | 3.0 | 3.3 | V |
| 5V I/O (VDD as output) |
－ | － | － | V | ||
| 輸入/輸出針腳(Pin)電源 | VDDIO | Low Voltage I/O | 2.4 | 3.0 | 3.3 | V |
| 5V I/O | 4.4 | 5.0 | 5.3 | V | ||
| 工作電壓 | VCC | － | 8.0 | 10.0 | 10.5 | V |
| 8.0 | 12.0 | 12.5 | V | |||
| 輸入高電壓 | VIH | － | 0.8xVDDIO | － | － | V |
| 輸入低電壓 | VIL | － | － | － | 0.2xVDDIO | V |
| 輸出高電壓 | VOH | IOH=-0.5mA | 0.9xVDDIO | － | － | V |
| 輸出低電壓 | VOL | IOL=0.5mA | － | － | 0.1xVDDIO | V |
| 50%顯示畫面耗電流 | ICC | VCC=10V | － | 19 | 29 | mA |
| VCC=12V | － | 23 | 35 | mA |
可選FPC :
| 圖示 | FPC長度 | PIN | pitch | ZIF FPC or HOTBAR FPC | 介面 | FPC No. | Create Date |
|---|---|---|---|---|---|---|---|
 |
35.2 | 31 | 0.7 | BOTBAR FPC | 6800,8080,SPI,I2C | FPC2070003111XXXXX00 | 20120921 |
 |
31 | 34 | 0.5 | ZIF FPC | 6800,8080,SPI,I2C | FPC2005003421XXXXX00 | 20151223 |
Search keyword: oled 20x4, 20x4 oled
