| Pin |
符號 |
功能說明 |
| 1 |
IF1 |
Input data format control |
| 2 |
IF2 |
Input data format control |
| 3 |
POL |
Polarity Signal connect to VCOM driving circuit. |
| 4 |
RESET |
Hardware reset |
| 5 |
SPENA |
Chip select |
| 6 |
SPCL |
Serial Clock |
| 7 |
SPDA |
Serial Data |
| 8 |
B0 |
Blue Data bit |
| 9 |
B1 |
Blue Data bit |
| 10 |
B2 |
Blue Data bit |
| 11 |
B3 |
Blue Data bit |
| 12 |
B4 |
Blue Data bit |
| 13 |
B5 |
Blue Data bit |
| 14 |
B6 |
Blue Data bit |
| 15 |
B7 |
Blue Data bit |
| 16 |
G0 |
Green Data bit |
| 17 |
G1 |
Green Data bit |
| 18 |
G2 |
Green Data bit |
| 19 |
G3 |
Green Data bit |
| 20 |
G4 |
Green Data bit |
| 21 |
G5 |
Green Data bit |
| 22 |
G6 |
Green Data bit |
| 23 |
G7 |
Green Data bit |
| 24 |
R0 |
Red Data bit |
| 25 |
R1 |
Red Data bit |
| 26 |
R2 |
Red Data bit |
| 27 |
R3 |
Red Data bit |
| 28 |
R4 |
Red Data bit |
| 29 |
R5 |
Red Data bit |
| 30 |
R6 |
Red Data bit |
| 31 |
R7 |
Red Data bit |
| 32 |
Hsync |
Horizontal synchronous signal |
| 33 |
Vsync |
Vertical synchronous signal |
| 34 |
Data CLK |
Dot data clock |
| 35 |
AVDD(analog) |
Analog power: 4.5V~5.5V |
| 36 |
AVDD(analog) |
Analog power: 4.5V~5.5V |
| 37 |
VCC(Digital) |
Digital power: 3V~3.6V |
| 38 |
VCC(Digital) |
Digital power: 3V~3.6V |
| 39 |
NPC |
NTSC/PAL mode Auto detection result H:NTSC/L:PAL |
| 40 |
VGL |
Gate off power |
| 41 |
VGL |
Gate off power |
| 42 |
UD |
Up/down selection |
| 43 |
VGH |
Gate on power |
| 44 |
LRC |
Shift direction of device internal shift register control. |
| 45 |
GND |
System ground pin of the IC.
Connect to system ground. |
| 46 |
VCOM |
VCOM driving input |
| 47 |
VCOM |
VCOM driving input |
| 48 |
ENB |
Signal to settle the horizontal display position |
| 49 |
GND |
System ground pin of the IC.
Connect to system ground. |
| 50 |
GND |
System ground pin of the IC.
Connect to system ground. |
