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规格图
Data source ref:WO12864C2-TFH#
产品规格
Pin功能定义
| Pin No. | 符号 | Level | 说明 | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | IRS | I | This terminal selects the resistors for the V0 voltage level adjustment. IRS = “H”: Use the internal resistors IRS = “L”: Do not use the internal resistors. The V0 voltage level is regulated by an external resistive voltage divider attached to the VR terminal |
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| 2 | /HPM | I | This is the power control terminal for the power supply circuit for liquid crystal drive. /HPM = “H”: Normal mode /HPM = “L”: High power mode (Default) |
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| 3 | P/S | I | This is the parallel data input/serial data input switch terminal. P/S = “H”: Parallel data input. P/S = “L”: Serial data input. The following applies depending on the P/S status:
/RD (E) and /WR (R/W) are fixed to either “H” or “L”. With serial data input, It is impossible read data from RAM |
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| 4 | C86 | I | This is the MPU interface selection pin. C86 = “H”: 6800 Series MPU interface. C86 = “L”: 8080 Series MPU interface |
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| 5 | VR | I | Output voltage regulator terminal. Provides the voltage between VSS and V0 through a resistive voltage divider. IRS = “L” : the V0 voltage regulator internal resistors are not used. IRS = “H” : the V0 voltage regulator internal resistors are used. |
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| 6~10 | V0~V4 | Power supply | This is a multi-level power supply for the liquid crystal drive. | |||||||||||||||
| 11 | VRS | Power supply | This is the internal-output VREG power supply for the LCD power supply voltage regulator | |||||||||||||||
| 12 | CAP4+ | O | DC/DC voltage converter. | |||||||||||||||
| 13 | CAP2- | O | DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2P terminal. | |||||||||||||||
| 14 | CAP2+ | O | DC/DC voltage converter. Connect a capacitor between this terminal and the CAP2N terminal. | |||||||||||||||
| 15 | CAP1+ | O | DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1N terminal. | |||||||||||||||
| 16 | CAP1- | O | DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1P terminal. | |||||||||||||||
| 17 | CAP3+ | O | DC/DC voltage converter. Connect a capacitor between this terminal and the CAP1N terminal. | |||||||||||||||
| 18 | CAP5+ | O | DC/DC voltage converter. | |||||||||||||||
| 19 | VOUT | O | DC/DC voltage converter. Connect a capacitor between this terminal and vss or VDD | |||||||||||||||
| 20 | VSS | Power supply | Ground | |||||||||||||||
| 21 | VDD | Power supply | Power supply | |||||||||||||||
| 22~29 | D7~D0 | I/O | Data bus line | |||||||||||||||
| 30 | /RD(E) | I | • When connected to 8080 series MPU, this pin is treated as the “/RD” signal of the 8080 MPU and is LOW-active. The data bus is in an output status when this signal is “L”. • When connected to 6800 series MPU, this pin is treated as the “E” signal of the 6800 MPU and is HIGH-active. This is the enable clock input terminal of the 6800 Series MPU. |
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| 31 | /WR(R/W) | I |
• When connected to 8080 series MPU, this pin is treated as the “/WR” signal of the 8080 MPU and is LOW-active. |
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| 32 | A0 | I | This is connect to the least significant bit of the normal MPU address bus, and it determines whether the data bits are data or command. A0 = “H”: Indicates that D0 to D7 are display data. A0 = “L”: Indicates that D0 to D7 are control data. |
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| 33 | /RES | I | When RES is set to “L”, the setting are initialized. | |||||||||||||||
| 34 | /CS1 | I | This is the chip select signal. |
规格说明
| 项目 | 标准尺寸 | 单位 |
|---|---|---|
| 点阵(分辨率) | 128 x 64 | － |
| 模块尺寸 | 55.2 x 39.8 x 6.5 | mm |
| 检视区域 | 45.2 x 27.0 | mm |
| 有效区域 | 40.92 x 24.28 | mm |
| 点大小 | 0.28 x 0.34 | mm |
| 点间距 | 0.32 x 0.38 | mm |
| 驱动方式 | 1/65 , 1/9 Bias | |
| 背光类型 | LED | |
| IC | ST7565P | |
| 接口 | 6800/8080/4-Line SPI | |
最大绝对额定值
| 项目 | 符号 | 最小值 | 典型值 | 最大值 | 单位 |
|---|---|---|---|---|---|
| 工作温度 | TOP | -20 | － | +70 | ℃ |
| 储存温度 | TST | -30 | － | +80 | ℃ |
| 电源电压 | VDD | -0.3 | － | 3.6 | V |
| Power supply voltage (VDD standard) | V0,VOUT | -0.3 | － | 14.5 | V |
| Power supply voltage (VDD standard) | V1,V2,V3,V4 | -0.3 | － | V0+0.3 | V |
电气特性
| 项目 | 符号 | 条件 | 最小值 | 典型值 | 最大值 | 单位 |
|---|---|---|---|---|---|---|
| 逻辑电源电压 | VDD-VSS | － | 2.7 | 3.0 | 3.3 | V |
| LCM电源电压 | V0-VSS | Ta=-20℃ Ta=25℃ Ta=70℃ |
－ 9.4 － |
－ 9.6 － |
－ 9.8 － |
V V V |
| 输入高电压 | VIH | － | 0.8 VDD | － | VDD | V |
| 输入低电压 | VIL | － | VSS | － | 0.2VDD | V |
| 输出高电压 | VOH | － | 0.8VDD | － | VDD | V |
| 输出低电压 | VOL | － | VSS | － | 0.2VDD | V |
| 供电电流（不包括LED背光） | IDD | VDD=3.0V | － | 0.49 | 1.0 | mA |
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