우리는 귀하의 프라이버시를 소중히 여깁니다
"모든 쿠키 허용"을 클릭하면 사이트 탐색을 개선하고, 사이트 사용을 분석하며, 마케팅 및 성능 노력에 도움을 주기 위해 쿠키를 귀하의 장치에 저장하는 데 동의한 것으로 간주됩니다. 이 주제에 대한 추가 정보는 당사의 정책에서 확인할 수 있습니다. 개인정보 보호정책
도면
Data source ref:WEO012864AAWAP3N00000
사양
기계적 데이터
| 항목 | 치수 | 단위 |
|---|---|---|
| 도트 매트릭스 | 128 × 64 | dots |
| 모듈 치수 | 42.04 × 27.22 × 1.41 | mm |
| 활성 영역 | 35.05 × 17.51 | mm |
| 도트 크기 | 0.249 × 0.249 | mm |
| 도트 피치 | 0.274 × 0.274 | mm |
| 디스플레이 모드 | 패시브 매트릭스 (Passive Matrix) | |
| 디스플레이 색 | Monochrome | |
| Drive Duty | 1/64 Duty | |
| IC | SSD1327 | |
| 인터페이스 | 6800/8080/4-Wire SPI/I2C | |
| 크기 | 1.54 인치 | |
절대 최대 정격값
| Parameter | 기호 | 최소값 | 최대값 | 단위 |
|---|---|---|---|---|
| Low voltage power supply, power supply for I/O pins | VCI | -0.3 | 4.0 | V |
| Supply Voltage for Logic | VDD | -0.5 | 2.75 | V |
| Supply Voltage for Display | VCC | -0.5 | 19.0 | V |
| 작동 온도 | TOP | -40 | +80 | °C |
| 보관 온도 | TSTG | -40 | +85 | °C |
전기적 특성
DC 전기적 특성
| 항목 | 기호 | 조건 | 최소값 | 대표값 | 최대값 | 단위 |
|---|---|---|---|---|---|---|
| Low voltage power supply, power supply for I/O pins |
VCI | － | 1.65 | 3.0 | 3.5 | V |
| Supply Voltage for Display | VCC | － | 8.0 | 12.5 | 13.0 | V |
| Supply Voltage for Logic | VDD | － | 1.65 | － | 2.6 | V |
| High Level Input | VIH | － | 0.8×VCI | － | VCI | V |
| Low Level Input | VIL | － | 0 | － | 0.2×VCI | V |
| High Level Output | VOH | － | 0.9×VCI | － | VCI | V |
| Low Level Output | VOL | － | 0 | － | 0.1×VCI | V |
| 50% Check Board operating Current | ICC | VCC =12.5V | － | 10 | 20 | mA |
인터페이스 핀 기능
| Pin No. | 기호 | 기능 | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | VSS | This is a ground pin. | |||||||||||||||
| 2 | VCC | Power supply for panel driving voltage. | |||||||||||||||
| 3 | VCOMH | COM signal deselected voltage level. A capacitor should be connected between this pin and VSS. No external power supply is allowed to connect to this pin. |
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| 4 | VCI | Low voltage power supply and power supply for interface logic level. It should match with the MCU interface voltage level and must be connected to external source. VCI must always set to be equivalent to or higher than VDD. |
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| 5 | VDD | Power supply pin for core logic operation. VDD can be supplied externally (within the range of 2.4V to 2.6V) or regulated internally from VCI. A capacitor should be connected between VDD and VSS under all circumstances. |
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| 6 | BS1 | Communicating Protocol Select These pins are MCU interface selection input. See the following table:
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| 7 | BS2 | ||||||||||||||||
| 8 | VSS | This is a ground pin. | |||||||||||||||
| 9 | IREF | This pin is the segment output current reference pin. A resistor should be connected between this pin and VSS to maintain the current around 10uA. |
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| 10 | CS# | This pin is the chip select input. The chip is enabled for MCU communication only when CS# is pulled low. | |||||||||||||||
| 11 | RES# | This pin is reset signal input. When the pin is low, initialization of the chip is executed. | |||||||||||||||
| 12 | D/C# | This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, the data at D[7:0] will be interpreted as data. When the pin is pulled LOW, the data at D[7:0] will be transferred to a command register. In I2C mode, this pin acts as SA0 for slave address selection. |
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| 13 | R/W# (WR#) | This pin is read / write control input pin connecting to the MCU interface. When 6800 interface mode is selected, this pin will be used as Read/Write (R/W#) selection input. Read mode will be carried out when this pin is pulled HIGH and write mode when LOW. When 8080 interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled LOW and the chip is selected. When serial or I2C interface is selected, this pin must be connected to VSS. |
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| 14 | E/RD# | This pin is MCU interface input. When 6800 interface mode is selected, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled HIGH and the chip is selected. When 8080 interface mode is selected, this pin receives the Read (RD#) signal. Read operation is initiated when this pin is pulled LOW and the chip is selected. When serial or I2C interface is selected, this pin must be connected to VSS. |
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| 15 | D0 | These pins are 8-bit bi-directional data bus to be connected to the microprocessor’s data bus. When serial mode is selected, D1 will be the serial data input SDIN and D0 will be the serial clock input SCLK. | |||||||||||||||
| 16 | D1 | ||||||||||||||||
| 17 | D2 | ||||||||||||||||
| 18 | D3 | ||||||||||||||||
| 19 | D4 | ||||||||||||||||
| 20 | D5 | ||||||||||||||||
| 21 | D6 | ||||||||||||||||
| 22 | D7 | ||||||||||||||||
| 23 | VCC | Power supply for panel driving voltage. | |||||||||||||||
| 24 | VSS | This is a ground pin. |