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Data source ref: WEO160128BWPP3N00000
사양
인터페이스 핀 기능
| No. | 기호 | 기능 | ||||||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | NC | No connection | ||||||||||||||||||||||||
| 2 | VPP | This is the most positive voltage supply pad of the chip. It should be supplied externally. |
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| 3 | VSEGM | This is a segment pre-charge voltage. A capacitor can be connected between this pad and VSS if necessary. When external capacitor Is not used, this pin should be kept NC. |
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| 4 | VCOMH | This is a pad for the voltage output high level for common signals. A capacitor should be connected between this pad and VSS. |
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| 5 | VSL | Discharge voltage level pad. This pad should be connected to resistor and diode externally. |
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| 6 | NC | No connection | ||||||||||||||||||||||||
| 7 | IREF | This is a segment current reference pad. A resistor should be connected between this pad and VSS. . |
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| 8 | VPP | This is the most positive voltage supply pad of the chip. It should be supplied externally. |
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| 9 | NC | No connection | ||||||||||||||||||||||||
| 10 | VSS | Ground for logic and analog. This pad should be connected to GND externally. | ||||||||||||||||||||||||
| 11 | VCL | This is a common voltage reference pad. This pad should be connected to VSS externally. |
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| 12 | VDD | Power supply for logic and input/output | ||||||||||||||||||||||||
| 13 | IM0 | These are the MPU interface mode select pads.
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| 14 | IM1 | |||||||||||||||||||||||||
| 16 | IM2 | |||||||||||||||||||||||||
| 15 | VDD | Power supply for logic and input/output | ||||||||||||||||||||||||
| 17 | CS | This pad is the chip select input. When CSB = "L", then the chip select becomes active, and data command I/O is enabled. When in I2C interface, this pin is not used, so it must be connected to "L". | ||||||||||||||||||||||||
| 18 | RES | This is a reset signal input pad. When RESB is set to "L", the settings are initialized. The reset operation is performed by the RESB signal level. This pin internal pull high. | ||||||||||||||||||||||||
| 19 | A0 | This is the Data/Command control pad that determines whether the data bits are data or a command. A0 = "H ": the inputs at D0 to D7 are treated as display data. A0 = "L ": the inputs at D0 to D7 are transferred to the command registers. In I2C interface, this pad serves as SA0 to distinguish the different address of OLED driver. When in 3-wire interface, this pin is not used, so it must be connected to "L ". |
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| 20 | WR | This is a MPU interface input pad. When connected to an 8080 MPU, this is active LOW. This pad connects to the 8080 MPU WR signal. The signals on the data bus are latched at the rising edge of the WR signal. When connected to a 6800 Series MPU: This is the read/write control signal input terminal. When R/W = "H ": Read. When R/W = "L ": Write. When in 3-wire.4-wire & I2C interface, this pin is not used, so it must be connected to "L ". |
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| 21 | RD | This is a MPU interface input pad. When connected to an 8080 series MPU, it is active LOW. This pad is connected to the RD signal of the 8080 series MPU, and the data bus is in an output status when this signal is "L". When connected to a 6800 series MPU, this is active HIGH. This is used as an enable clock input of the 6800 series MPU. When in 3-wire.4-wire & I2C interface, this pin is not used, so it must be connected to "L". |
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| 22 | D0 | This is an 8-bit bi-directional data bus that connects to an 8-bit or 16-bit standard MPU data bus. When the serial interface(SPI) and I2C is selected, then D0 serves as the serial clock input pad (SCL) and D1 serves as the serial data input pad (SI). At this time, D2 to D7 are set to high impedance. D7~D2 is recommended to connect the VDD or GND. It is also allowed to leave D7~D2 unconnected. |
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| 23 | D1 | |||||||||||||||||||||||||
| 24 | D2 | |||||||||||||||||||||||||
| 25 | D3 | |||||||||||||||||||||||||
| 26 | D4 | |||||||||||||||||||||||||
| 27 | D5 | |||||||||||||||||||||||||
| 28 | D6 | |||||||||||||||||||||||||
| 29 | D7 | |||||||||||||||||||||||||
| 30 | NC | No connection | ||||||||||||||||||||||||
| 31 | VPP | This is the most positive voltage supply pad of the chip. It should be supplied externally. |
기계적 데이터
| 항목 | 치수 | 단위 |
|---|---|---|
| 도트 매트릭스 | 128 × 160 | Dots |
| 모듈 치수 | 34.5 × 48.8 × 1.41 | mm |
| 활성 영역 | 28.908 × 39.34 | mm |
| 도트 크기 | 0.206 × 0.226 | mm |
| 도트 피치 | 0.226 × 0.246 | mm |
| 디스플레이 모드 | 패시브 매트릭스 | |
| 디스플레이 색상 | Monochrome | |
| Drive Duty | 1/128 Duty | |
| IC | CH1120 | |
| 인터페이스 | 6800, 8080, SPI, I2C | |
| 크기 | 1.92 인치 | |
절대 최대 정격값
| Parameter | 기호 | 최소값 | 최대값 | 단위 |
|---|---|---|---|---|
| Supply Voltage for Logic | VDD | -0.3 | 3.5 | V |
| Supply Voltage for Display | VPP | -0.3 | 15.0 | V |
| 작동 온도 | TOP | -40 | +80 | °C |
| 보관 온도 | TSTG | -40 | +85 | °C |
전기적 특성
| 항목 | 기호 | 조건 | 최소값 | 대표값 | 최대값 | 단위 |
|---|---|---|---|---|---|---|
| Supply Voltage for Logic | VDD | － | 1.65 | 3.0 | 3.5 | V |
| Supply Voltage for Display | VPP | － | 11.5 | 12.0 | 12.5 | V |
| Input High Volt. | VIH | － | 0.8xVDD | － | VDD | V |
| Input Low Volt. | VIL | － | VSS | － | 0.2xVDD | V |
| Output High Volt. | VOH | IOH=-0.5mA | 0.8xVDD | － | VDD | V |
| Output Low Volt. | VOL | IOL=0.5mA | VSS | － | 0.2xVDD | V |
| Display 50% Pixel on | IPP | VPP=12V | － | 25 | 37.5 | mA |
