Modelo Nº WEO012864H
►Tipo : Gráfico
►Estructura : COG (WEO012864H); Frame Option (WEF012864H)
►Tamaño : 2.42 pulgada
►Matriz de puntos 128 x 64
►IC：SSD1309
►Fuente de alimentación de 3V
►1/64 duty
►Interfaz : 6800, 8080, SPI, I2C
►Color de la pantalla: Blanco / Amarillo / Azul cielo / Verde
Data source ref:WEO012864HWPP3N00000
| Elemento | Dimensión | Unidad |
|---|---|---|
| Matriz de puntos | 128 x 64 Dots | － |
| Dimensión del módulo | 60.5 × 37.0 × 2.15 | mm |
| zona activa | 55.01 × 27.49 | mm |
| Tamaño del píxel | 0.40 × 0.40 | mm |
| Paso de píxel | 0.43 × 0.43 | mm |
| Modo de visualización | Matriz Pasiva | |
| Color de la pantalla | Monocromático | |
| Drive Duty | 1/64 Duty | |
| IC | SSD1309 | |
| Interfaz | 6800, 8080, 4-Wire SPI, I2C | |
| Diagonal | 2.42 pulgada | |
| Parámetro | Símbolo | Valor mín. | Valor máx. | Unidad |
|---|---|---|---|---|
| Tensión de Alimentación para Lógica | VDD | -0.3 | 4 | V |
| Tensión de alimentación para el display | VCC | 0 | 15 | V |
| Temperatura de funcionamiento | TOP | -40 | +80 | °C |
| Temperatura de almacenamiento | TSTG | -40 | +85 | °C |
| Elemento | Símbolo | Condición | Valor mín. | Valor típico | Valor máx. | Unidad |
|---|---|---|---|---|---|---|
| Tensión de Alimentación para Lógica | VDD | － | 2.8 | 3.0 | 3.3 | V |
| Tensión de alimentación para el display | VCC | － | 12.5 | 13 | 13.5 | V |
| Entrada de Alto Nivel | VIH | － | 0.8×VDD | － | － | V |
| Entrada de Bajo Nivel | VIL | － | 0 | － | 0.2×VDD | V |
| Salida de Alto Nivel | VOH | － | 0.9×VDD | － | － | V |
| Salida de Bajo Nivel | VOL | － | 0 | － | 0.1×VDD | V |
| Corriente operativa de la placa al 50% | VCC =13.0V | － | 18 | 22 | mA | |
| No. | Símbolo | Función | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | NC(GND) | No connection | |||||||||||||||
| 2 | VCC | Power supply for panel driving voltage. This is also the most positive power voltage supply pin. | |||||||||||||||
| 3 | VCOMH | COM signal deselected voltage level. A capacitor should be connected between this pin and VSS. |
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| 4 | IREF | This pin is the segment output current reference pin. IREF is supplied externally. A resistor should be connected between this pin and VSS to maintain the current around 10uA. |
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| 5~12 | D7~D0 | These pins are bi-directional data bus connecting to the MCU data bus. Unused pins are recommended to tie LOW. When serial interface mode is selected, D0 will be the serial clock input: SCLK; D1 will be the serial data input: SDIN and D2 should be kept NC. When I2C mode is selected, D2, D1 should be tied together and serve as SDAout, SDAin in application and D0 is the serial clock input, SCL. |
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| 13 | E/RD# | This pin is MCU interface input. When 6800 interface mode is selected, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled HIGH and the chip is selected. When 8080 interface mode is selected, this pin receives the Read (RD#) signal. Read operation is initiated when this pin is pulled LOW and the chip is selected. When serial or I2C interface is selected, this pin must be connected to VSS. |
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| 14 | R/W# | This pin is read / write control input pin connecting to the MCU interface. When 6800 interface mode is selected, this pin will be used as Read/Write (R/W#) selection input. Read mode will be carried out when this pin is pulled HIGH and write mode when LOW. When 8080 interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled LOW and the chip is selected. When serial or I2C interface is selected, this pin must be connected to VSS. |
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| 15 | D/C# | This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, the data at D[7:0] will be interpreted as data. When the pin is pulled LOW, the data at D[7:0] will be transferred to a command register. In I2C mode, this pin acts as SA0 for slave address selection. |
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| 16 | RES# | This pin is reset signal input. When the pin is pulled LOW, initialization of the chip is executed. Keep this pin pull HIGH during normal operation. |
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| 17 | CS# | This pin is the chip select input connecting to the MCU. The chip is enabled for MCU communication only when CS# is pulled LOW (active LOW). |
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| 18 | NC | No connection | |||||||||||||||
| 19 | BS2 | MCU bus interface selection pins. Select appropriate logic setting as described in the following table. BS2 and BS1 are pin select
Note (1) 0 is connected to VSS (2) 1 is connected to VDD |
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| 20 | BS1 | ||||||||||||||||
| 21 | VDD | Power supply pin for core logic operation | |||||||||||||||
| 22-29 | NC | No connection | |||||||||||||||
| 30 | VSS | Ground. | |||||||||||||||
| 31 | NC(GND) | No connection |
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