Pin No. |
符号 |
功能说明 |
1~2 |
IF1~IF2 |
Input data format control |
3 |
POL |
Polarity Signal connect to VCOM driving circuit. |
4 |
RESET |
Hardware reset |
5 |
SPENA |
Chip select |
6 |
SPCL |
Serial Clock |
7 |
SPDA |
Serial Data |
8~15 |
B0~B7 |
Blue Data bit |
16~23 |
G0~G7 |
Green Data bit |
24~31 |
R0~R7 |
Red Data bit |
32 |
Hsync |
Horizontal synchronous signal |
33 |
Vsync |
Vertical synchronous signal |
34 |
Data CLK |
Dot data clock |
35~36 |
AVDD(analog) |
Analog power: 4.5V~5.5V |
37~38 |
VCC(Digital) |
Digital power: 3V~3.6V |
39 |
NPC |
NTSC/PAL mode Auto detection result H:NTSC/L:PAL |
40~41 |
VGL |
Gate off power |
42 |
UD |
Up/down selection |
43 |
VGH |
Gate on power |
44 |
LRC |
Shift direction of device internal shift register control. |
45 |
GND |
System ground pin of the IC. Connect to system ground. |
46~47 |
VCOM |
VCOM driving input |
48 |
ENB |
Signal to settle the horizontal display position |
49~50 |
GND |
System ground pin of the IC. Connect to system ground. |