N° de modèle WEN025664D
►Type: Graphique
►Structure: CCOF+Frame+PCB
►Dimension: 5.5 pouces
►Matrice de points 256 x 64
►IC：SSD1322
►Alimentation 3V
►1/64 duty
►Interface: 6800, 8080, SPI
►Couleur d'affichage: Blanc / Jaune / Vert
►Support d’échelle grise
WEN025664D est un module OLED COF de 5,5 pouces intégrant le contrôleur SSD1322. Il offre une résolution de 256x64 points et des dimensions de 135.65 × 33.89 mm. Il prend en charge les interfaces 6800/8080 8 bits et SPI 3/4 fils, fonctionne sous 3V, avec un duty 1/64, un niveau de gris 4 bits et un contraste de 10000:1.
Le module intègre un PCB avec châssis, permettant une connexion par câble et réduisant le besoin de conception supplémentaire. Les circuits VDD et les configurations d’interface sont intégrés. Quatre trous de fixation facilitent l’intégration mécanique.
Température de fonctionnement : -40℃ à +80℃ ; stockage : -40℃ à +85℃.
Options disponibles :
Adapté aux systèmes POS, distributeurs automatiques, dispositifs portables, équipements médicaux et industriels.
| Caractéristique | Dimension | Unité |
|---|---|---|
| Matrice de points | 256 × 64 Dots | － |
| Dimensions du module | 147.0 × 59 × 2.5 | mm |
| Zone active | 135.65 × 33.89 | mm |
| Taille du pixel | 0.50 × 0.50 | mm |
| Pas du pixel | 0.53 × 0.53 | mm |
| Mode d’affichage | Passive Matrix | |
| Couleur d’affichage | Monochrome | |
| Rapport de balayage | 1/64 | |
| Niveaux de gris | 4 bits | |
| IC | SSD1322 | |
| Interface | 6800, 8080, SPI | |
| Taille | 5.5 inch | |
| Paramètre | Symbole | Min | Max | Unité |
|---|---|---|---|---|
| Tension d’alimentation du display | VDD | -0.3 | 4 | V |
| Température de fonctionnement | TOP | -40 | +80 | °C |
| Température de stockage | TSTG | -40 | +85 | °C |
| Paramètre | Symbole | Condition | Min | Typ | Max | Unité |
|---|---|---|---|---|---|---|
| Tension d’alimentation logique | VDD | － | 2.8 | 3.0 | 3.3 | V |
| Niveau d’entrée haut | VIH | － | 0.8×VDD | － | VDD | V |
| Niveau d’entrée bas | VIL | － | 0 | － | 0.2×VDD | V |
| Niveau de sortie haut | VOH | － | 0.9×VDD | － | VDD | V |
| Niveau de sortie bas | VOL | － | 0 | － | 0.1×VDD | V |
| Affichage 50 % des pixels allumés | IDD | VDD =3V | － | 240 | 400 | mA |
| Pin Number |
Symbole | I/O | Description | ||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 1 | VSS | P | Ground. | ||||||||||
| 2 | VDD | P | Power Supply for Core Logic Circuit Power supply pin for core logic operation. A capacitor is required to connect between this pin and VSS |
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| 3 | N.C. | P | Reserved Pin The N.C. pin between function pins are reserved for compatible and flexible design. |
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| 4 | D/C# | I | Data/Command Control This pin is Data/Command control pin connecting to the MCU. When the pin is pulled HIGH, the content at D[7:0] will be interpreted as data. When the pin is pulled LOW, the content at D[7:0] will be interpreted as command. |
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| 5 | R/W# (WR#) |
I | Read/Write Select or Write This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as Read/Write (R/W#) selection input. Pull this pin to “High” for read mode and pull it to “Low” for write mode. When 80XX interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled low and the CS# is pulled low. When serial mode is selected, this pin must be connected to VSS. |
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| 6 | E(/RD#) | I | Read/Write Enable or Read This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled high and the CS# is pulled low. When connecting to an 80XX-microprocessor, this pin receives the Read (RD#) signal. Data read operation is initiated when this pin is pulled low and CS# is pulled low. When serial mode is selected, this pin must be connected to VSS. |
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| 7~14 | DB0 | I/O | Host Data Input/Output Bus These pins are 8-bit bi-directional data bus to be connected to the microprocessor’s data bus. When serial mode is selected, D1 will be the serial data input SDIN and D0 will be the serial clock input SCLK. |
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| DB1 | |||||||||||||
| DB2 | |||||||||||||
| DB3 | |||||||||||||
| DB4 | |||||||||||||
| DB5 | |||||||||||||
| DB6 | |||||||||||||
| DB7 | |||||||||||||
| 15 | NC | P | Reserved Pin The N.C. pin between function pins are reserved for compatible and flexible design. |
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| 16 | RES# | I | This pin is reset signal input. When the pin is pulled LOW, initialization of the chip is executed. Keep this pin pull HIGH during normal operation. |
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| 17 | CS# | I | Data/Command Control This pin is the chip select input connecting to the MCU. The chip is enabled for MCU communication only when CS# is pulled LOW. |
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| 18 | NC | P | Reserved Pin The N.C. pin between function pins are reserved for compatible and flexible design. |
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| 19 | BS1 | I | Communicating Protocol Select These pins are MCU interface selection input. See the following table:
(1) 0 is connected to VSS (2) 1 is connected to VDD |
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| 20 | BS0 | ||||||||||||
| 21 | NC | － | No connection | ||||||||||
| 22 | NC | － | No connection | ||||||||||
| 23 | NC | － | No connection | ||||||||||
| 24 | NC | － | No connection |
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